The present invention relates to a semiconductor device and a method of fabricating the same. More particularly, the present invention relates to a fully-depleted silicon-on-nothing (SON) device.
Electronic devices are widely used in almost all aspects of life. These devices are getting smaller; thus the circuitry inside the devices is also being downscaled. In order to maintain this trend, new ways to reduce the size of field effect transistors, such as metal-oxide semiconductor field effect transistors and complementary metal-oxide semiconductors, need to be developed. The smaller circuitry also needs to perform better than its larger counterparts.
One of the developments in downscaled semiconductor technology is extremely-thin silicon-on-insulator (ETSOI) devices. ETSOI devices have a number of advantages. However, the thickness variation in ETSOI leads to Vt roll-off and sub-threshold slope variability, especially for a gate length less than 25 nm. Silicon-on-nothing (SON) devices offer controlled, epitaxially-grown silicon channel disposed on an insulator layer. However, unlike ETSOI, these devices have a source and a drain on a bulk substrate, causing significant leakage current below the insulator layer. Moreover, conventional SON devices have dopant segregation in the floating dielectric resulting in lower effective dose and higher extension region resistance.
The proposed invention describes a fully-depleted SON device with better short-channel characteristics than partially-depleted/conventional SON devices. The structure includes an undoped-SON on an undoped-thin-SOI substrate. The structure eliminates the need for well implants, provides better Vt roll-off and lower off-state current compared to conventional SON.